1. Field of the Invention
This invention relates to an active matrix display device, specifically to an active matrix display device in which a plurality of retaining circuits are disposed corresponding to a pixel element.
2. Description of the Related Art
There has been a great demand on the market for portable devices with a display such as a portable TV and a portable telephone. All these devices need a small, lightweight and low-power consumption display device. Development efforts have been made accordingly.
FIG. 5 shows a circuit diagram of one display pixel element of a conventional liquid crystal display device. On an insulating substrate 101, a plurality of gate signal lines 102 are disposed in one direction. A plurality of analog signal lines 103 are disposed in a direction perpendicular to the gate signal lines 102. Near the crossing of both signal lines, a pixel element selection thin film transistor 104 connected to both signal lines 102, 103 is disposed. The thin film transistor will be referred to as the TFT hereafter. The analog signal line 103 is connected to a pixel element electrode 105 through the pixel element selection TFT 104. A storage capacitance element 106 for holding the voltage of the pixel element electrode 105 for one field period is formed. The pixel element selection TFT 104 is connected to one terminal of the storage capacitance element 106. The common voltage among the display pixel elements is provided with to the other terminal 107 of the storage capacitance element 106. The pixel element selection TFT 104, pixel element electrode 105, and storage capacitance element 106 are disposed for each of the pixel elements.
A gate driver 108 and a drain driver 109 are formed in the peripheral area of the substrate 101. A plurality of the gate signal lines 102 are connected to the gate driver 108 and provided with sequentially scanning signals. A plurality of the analog signal lines 103 are connected to the drain driver 109, which supplies the image signal voltage corresponding to each of the analog image signal lines 103. When the scanning signal (H level) is applied to the gate signal line 102, the pixel element selection TFT 104 connected to the gate signal line 102 turns on. An analog image signal is then transmitted to the pixel element electrode 105 through the analog signal line 103 and retained in the storage capacitance element 106. The image signal voltage applied to the pixel element electrode 105 is then applied to a liquid crystal, which aligns itself in response to the applied voltage, acquiring the liquid crystal display. Therefore, the liquid crystal display device can implement both a moving picture display and a still picture display.
In Japanese Laid-Open Patent Publication No. Hei 8-194205, a display device, in which a memory element is disposed for each of the pixel elements, and in which the drive of peripheral circuits is halted during the still picture display, is disclosed. Thus, power consumption by the display device is reduced.
FIG. 6 is a circuit diagram of one pixel element of the conventional active matrix display device with a memory element.
On the insulating substrate 101, the gate signal line 102 and an address signal line 121 are disposed crossing each other. Near the crossing, a pixel element selection TFT 122 connected to both signal lines 102, 121 is formed. Also, digital signal lines 123 are formed in the direction parallel to the address signal line. The number of the digital signal lines 123 corresponds to the number of the bits of the digital signal supplied to one row of the pixel elements. In the figure, the number of the bits is four, and thus, four digital signal lines are disposed. Each of the digital signal lines 123 is connected to a memory element 124. When the pixel element selection TFT 122 turns on, the memory element 124 holds the voltage of the digital signal line 123 as the binary voltage, which is either on or off. The output from the memory element 124 is inputted to the gate of a sub-pixel element TFT 125 for controlling whether it is on of off. Each of the sub-pixel element TFTs 125 is connected to a sub-pixel element electrode 126. A reference voltage Ref is supplied to the sub-pixel element electrode 126, to which the sub-pixel element TFT 125 in the ON state is connected.
The gate driver 108 and a drain driver 127 are disposed in the peripheral area of the substrate 101. A plurality of the gate signal lines 102 are connected to the gate driver 108, which sequentially supplies the scanning signal. A plurality of the address signal lines 121 and the digital signal lines 123 are connected to the drain driver 127, which supplies the image signal voltage corresponding to each of the digital signal lines 123. When the scanning signal (H level) is applied to the gate signal line 102 and the address signal line 121, the pixel element selection TFT 122 connected to these signal lines turns on activating the memory element 124. At the same time, a digital image signal is transmitted to the memory element 124 from the digital signal line 123. The digital data is 4-bit data. The least significant bit D0 is transmitted to the digital signal line 123a and the most significant bit D3 is transmitted to the digital signal line 123d. When each bit data is high, the memory element 124 holds the data for outputting the high signal. The sub-pixel element TFT 125, to which the memory element 124 holding the high is connected, turns on. This provides the reference voltage to the sub-pixel element electrode 126, which is connected to the sub-pixel element TFT 125. Each of the sub-pixel element electrodes 126 has a different area. The area ratio of the sub-pixel element electrodes 126a-126d is as follows; 126a:126b:126c:126d=1:2:4:8. Therefore, by controlling the on and off operation of each sub-pixel element electrode 126 independently, the four-bits or 16-level gray scale display is possible.
The display device with the above configuration can reduce power consumption for a still picture display compared to a normal display. That is, it is also possible to keep showing the still picture with the drive of the gate driver 108 and the drain driver 127 halted when the memory element 124 is a SRAM, which is capable of retaining the data until the next data is over-written. When the memory element 124 is a DRAM, it is possible to slow down the operating cycle of the gate driver 108 and the drain driver 127 to a refresh cycle.
Next, the problems of the prior art will be explained. As described above, disposing the memory element for each pixel element can reduce power consumption. However, when the DRAM is used as the memory element, the quality of the display is significantly deteriorated because of fluctuations in the brightness or so-called flicker for each pixel element upon each refreshing operation.
In the prior art, arbitrary numbers of the sub-pixel element electrodes 126 are selected to receive the signal according to the data to be displayed. The sub-pixel element electrode to be made a bright spot and the sub-pixel element electrode to be made a dark spot exist mixed in one pixel element and the gray scale is expressed in terms of the area of the bright spot. This is because it is not possible to express the gray scale with the voltage in the still picture display mode. This is because the retaining circuit can only hold the binary data of high or low in the still picture display mode. However, the disposition of the sub-pixel element electrodes 126 shown in FIG. 6 has the following problem. That is, the distance between the bright spots differs between the case where the pixel element with the bright sub-pixel element electrode 126a only is adjacent to the pixel element with the bright sub-pixel element electrode 126d only and the case where the two pixel elements with all the sub-pixel element electrodes 126a-126d bright are located adjacent to each other. This causes the deterioration of the display quality, such as jagged lines, a dull edge, reduced resolution and an inappropriate mixing of R, G, and B.
Periodically inverting the direction of the electric field applied to the liquid crystal in a predetermined cycle is performed commonly because applying the electric field in one direction causes deterioration of the liquid crystal. In the moving picture display mode, the direction of the electric field is inverted once in each frame. That is, the inverting cycle is about 60 Hz. Also, when a DRAM is used as the memory element, there is leakage from the storage capacitance element in the DRAM, requiring a refreshing operation for the retained data with a predetermined cycle, as described before. Each of the inverting operation and the refreshing operation has an independent circuit and an independent cycle. Therefore, the circuit for the inverting operation and the circuit for the refreshing operation should be disposed independently.
Also, in the display device of the prior arts, the circuit for the moving picture display and the circuit for the still picture display are disposed in parallel and switching between the moving picture display mode and the still picture display mode is performed. Therefore, the circuits for each display mode should be integrated in each of the pixel elements. That is, the number of the elements disposed in one pixel element is relatively large, making reducing the size of the pixel element difficult. It is also difficult to make the high-resolution liquid crystal display device and to increase the number of the bits of the retained data.
Therefore, this invention is directed to offering an active matrix display device with a high quality display by preventing flickering when refreshing the DRAM.
The invention is also directed to improving the display quality of the active matrix display device, which has a retaining circuit corresponding to the sub-pixel element electrode in the still picture display mode.
Furthermore, this invention is directed to reducing the circuit size. Further size reduction of the display device can be achieved by reducing the circuit size of the peripheral driver circuits of the active matrix display device. Also, this invention is directed to improve the manufacturing yield.
This invention is further directed to an active matrix display device which is capable of retaining data with multiple-bits, and which can be made smaller by reducing the number of the elements integrated in one pixel element.